Documents

Memos

Ivan E Sutherland

 IES 02: FLEET-A Once Instruction Computer
 IES 03: Defining Some SHIPs
 IES 04: A Dozen Problems
 IES 05: Notation
 IES 06: More Notation
 IES 07: Literals
 IES 08: Addressing or Function?
 IES 09: Three Questions
 IES 10: Literals Revisited
 IES 11: Indirection
 IES 12: Four Views of FLEET
 IES 13: Snippets for a Three Input Adder
 IES 14: Fleet Definition
 IES 15: Spring Objectives
 IES 16: Ideas About Simulator Structure
 IES 17: Homework 1
 IES 18: Files Needed to Simulate FLEET
 IES 19: Homework 2
 IES 20: A Program to Define a FLEET
 IES 23: FIFO Register File
 IES 24: Parallel Switch Fabrics
 IES 25: Instruction Sequence in FLEET
 IES 26: Record SHIPs
 IES 27: Scatter and Gather
 IES 28: How Long is a Record?
 IES 29: The Size of a Record
 IES 30: FLEET definition dated August 2006
 IES 31: Some SHIPs
 IES 32: A Record Store Implementation
 IES 34: Talk at Harvard-slides
 IES 35: Some Ships-slides
 IES 36: ZOMA: return of the standing MOVE
 IES 37: A Description of a Fetch Ship
 IES 38: Description of a Fetch Ship-slides
 IES 39: Memory Read and Memory Write
 IES 44: Fleet Definition
 IES 45: OutBox
 IES 46: infinity
 IES 47: An Outline of the Review for Infinity
 IES 48: Results of a Design Review of Infinity
 IES 49: A Six Four GasP Tutorial
 IES 50: Requeue State Diagram

Igor Benko

 IB 01: Archsim Structure
 IB 02: GasP Model In Archsim
 IB 03: An XML Front End for ArchSim
 IB 04: Sequentiality in FLEET
 IB 05: GasP Exercises
 IB 06: GasP Exercises Solutions
 IB 08: FLEET Assembly

Adam Megacz

 AM 01: Minimal FLEETs
 AM 02: Records in FLEET
 AM 03: Standing Move Cycles
 AM 04: Subroutines in FLEET
 AM 05: Unified Moves
 AM 06: Fleet Description Language
 AM 07: FDL and Petri Nets
 AM 10: Boxes
 AM 11: Boxes: Data,Token,In,Out
 AM 12: Literals
 AM 13: Unified Boxes
 AM 14: Syntax
 AM 15: Decommissioning and Recycling
 AM 16: Ports
 AM 17: The Choice Ship
 AM 25: Opcode Ports
 AM 26: Ship Constants
 AM 27: Bypass Paths
 AM 28: Eschelon
 AM 31: A Simpler View of Fleet
 AM 32: Dock Specification (obsolete)

 AM 33: Dock Specification

 AM 34: Two Docks are Better Than One
 AM 37: Fleet Instruction Syntax
 AM 38: Draining All Inputs can be a Bad Idea
 AM 41: How to Wrap Verilog Code in a Fleet Ship
 The FleetTwo Architecture Manual: A Programmer's View of FleetTwo
 The FleetTwo Toolchain Manual: A Compiler Writer's View of FleetTwo

Greg Gibeling

 GDG 01: 1st Class Instructions for FLEET
 GDG 02: Function Calls for FLEET
 GDG 03: Memory SHIP Outline
 GDG 04: Two FLEET Programs
 GDG 05: Unified FLEET Assembly
 GDG 06: Assassination
 GDG 07: Summary of FLEET 2006

Trevor Meyerowitz

 TM 03: ArithmeticSHIP

Nemanja Isailovic

 NI 01: Memory Access SHIP v0 001

Matt Pierson

 MP 01: Would You Use A Sequential Strainer
 MP 02: Operation of Memory Access Ship

Amir Kamil

 AK 01: Unified Copies
 AK 02: Fetch SHIP
 AK 03: Goals for the Admiral Language
 AK 04: The Admiral Language Proposal

Douglas Densmore

 DMD 01: System Level Model Proposal
 DMD 02: Operation of Fetch SHIP

Thomas Kho

 TK 01: Sorting in Fleet

Relevant Literature

 FLEETzero: An Asynchronous Switching Experiment.
William S. Coates, Jon K. Lexau, Ian W. Jones, Scott M. Fairbanks, and Ivan E. Sutherland William S. Coates, Jon K. Lexau, Ian W. Jones, Scott M. Fairbanks, and Ivan E. Sutherland

 Micropipelines (Turing Award talk)
Ivan Sutherland

 GasP: A Minimal FIFO Control.
Ivan Sutherland and Scott Fairbanks

 Squaring the FIFO in GasP.
Jo Ebergen

Other

 Technology And Courage, Ivan Sutherland.

Fleet animation, by Angel Lin and Mike Holenderski (click on the animation and press the right arrow key)

The  course description from Fall 2005.

Slides from a talk by Ivan Sutherland,  The Fleet Architecture