slipway and abits

News

17-Aug-2008
I have converted the repository from darcs to git.

08-Apr-2008
I've gotten a lot of inquiries lately, so I'll post it here: all of my FPGA work is on hold right now while I finalize the architecture and design the programming model for a new clockless processor that has emerged from a collaboration between Berkeley and Sun Labs. The prototype chip is full-custom, which is a really refreshing change from being stuck with whatever the device vendors deem us worthy of having. Oh, and, get this: Sun doesn't threaten to sue their customers for trying to actually program the devices they buy from them. Imagine that!

21-Aug-2007
I've gone through and overhauled the map-place-and-route code. It no longer rips up all routes on each iteration (only the ones that overlap), and uses Betz' algorithm for multi-sink fanout nets. It's much, much faster now, and the code is clean enough that I can once again start adding features to it.

It's currently able to route an 8-bit adder constrained to a chunk of fabric four times its size (ie 25% lut utilization) in 2 seconds on my 2ghz machine. That sounds bad, until you consider that it's using a random, static placement; under those circumstances, it's not such a bad result. So, the router is in decent shape. Next step is to start doing more intelligent things with the placer (annealing, etc).

27-Jun-2007
The demo below is believed to be the first instance of a (simple) design being taken through a 100% open-source FPGA tool flow, from Icarus verilog all the way through to the Abits bitstream generator.

You can run the demo yourself if you have a slipway board by doing a darcs pull and then typing:

Here's what you see if you run it; a random placement followed by routing and then a random test vector sequence.

The design is a simple 8-bit combinational ripple-carry adder; you can see the verilog here

Big thanks to: Icarus Verilog (parsing, synthesis) and the BU EDIF parser.

The intermediate map, place, route, and “bitgen” are all custom Slipway/Abits code, but have been designed to be retargetable to other architectures. Placement is currently random and fixed (the next step is to move to Independence). The route algorithm used is a an approximation of the classic Pathfinder algorithm. Please keep in mind that this is all still incredibly crude and nowhere close to production-ready; it just barely handles combinational adders right now.

Note that a curious side effect of the Abits architecture is that it lets us actually update the device's configuration bits with the routes we're trying as we try them during the rip-up-and-re-route phase. I haven't yet found a use for this, but it strikes me as interesting and potentially useful. When routing finishes, the device is already fully configured and ready to go. Test vectors are input using partial reconfiguration and strobed back using the dynamic debug facility described in the FCCM'07 paper.

What are they?

Abits is a Java library for manipulating Atmel At94k bitstreams. It supports bitstream creation, parsing, modification, and partial reconfiguration. Abits is completely open-source and does not depend on any proprietary software.

Slipway is a low-cost development board for the At94k. It has a USB interface, is bus-powered and requires no drivers. The total cost of the board is $60 (including PCB fabrication), and it uses only through-hole solder joints, so it can easily be assembled by hand. Instructions can be found here. The board masks and host software (written in Java, using libftdi and libusb) are also open source.

Where can I get them?

You can find the slides from my talk and my paper here.

You can download the code for slipway+abits by using git like this:

Where can I discuss them?

The best place to discuss abits+slipway is on comp.arch.fpga. I read it every three days or so.

You can  email me directly, but I'd rather handle questions by replying to the newsgroup.

Gallery of Prototype Boards

rev.0.1

rev.0.2

rev.0.3

rev.0.4

rev.0.5

Pre-Slipway Board

The original development platform was a slightly-modified Atmel STK594 development board. You can find instructions for setting up that board here, but the custom slipway board is much easier to work with.

Useful Links

• AVR libc

• Some stuff covering RS-232

• AVR Assembler

rendered from WIX